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Tohoku University

Tohoku University Research News of Engineering (Tune) is a biannual publication of School of Engineering (SoE), Tohoku University, Sendai, Japan. Each Tune volume provides the scientific community with the latest research results of SoE on a selected topic.

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A Neuron Circuit Based on Spintronic Device: Novel Approach of Brain-Inspired VLSIs for Next-Generation Artificial Intelligence
Yitao MA (Center for Innovative Integrated Electronic Systems (CIES), Tohoku University / Center for Spintronics Integrated Systems (CSIS), Tohoku University)

A Neuron Circuit Based on Spintronic Device: Novel Approach of Brain-Inspired VLSIs for Next-Generation Artificial Intelligence

In June 2011, I came to Tohoku University from China in the immediate aftermath of the Great East Japan Earthquake and started my research at the green power electronics laboratory led by Professor Tetsuo Endoh. The laboratory is deeply involved in the wide-range studies based on next-generation perpendicular magnetic-tunnel-junction (p-MTJ) spintronic devices, including research topics on device physics, device architectures and high-performance low-power very-large-scale integration (VLSI) applications. In the wake of heavy damage from the earthquake, we have maintained close collaborations with many academic, enterprise and governmental partner organizations, and rapidly reconstructed a world-leading design/trial manufacture environment for VLSI implementation based on both the novel silicon and spintronic devices. The p-MTJ devices developed in our laboratory are proven to be truly effective for both the enhancement of processing capacity and the reduction of power consumption of VLSIs. In particular, except the extensive use as binary nonvolatile memory device, the p-MTJ is also attractive to be flexibly utilized in non-von Neumann computational circuits as a current-drive programmable resistor.

I came to the Endoh laboratory with a background of VLSI circuit design for intelligent image processing systems, on which I had obtained my Ph.D. from the University of Tokyo. Combining the VLSI circuit technology with the original p-MTJ devices of our laboratory, I am trying to open up a novel approach, the p-MTJ-based neuromorphic processors, for realizing brain-inspired VLSIs of future artificial intelligence. The neuromorphic processor is a recent high-visibility approach implementing the neural network in the VLSI processor consisting of millions of interconnected neuron circuits inspiring the learning and recognition functions of real neurons in the brain, in order to realize applications such as automotive vehicle control, human-computer interface, video surveillance, rescue robots and so forth. The challenging issue is that the neuron circuit as unit circuitry of the neuromorphic processor consumes a large circuit area and much electrical power, which has become the bottleneck for the practical uses in mobile and battery-driven systems.

As a breakthrough of this issue, we have developed a new neuron circuit employing compact and low-power analog architecture based on the p-MTJs. The neuron circuit consists of a number of synapses and a corresponding neuron body, in which the pulse-sequence voltage signals are utilized as neuronal inputs and outputs for realizing learning and recognition functions. We adopted the p-MTJs into the synapses, the key component of neuron circuit, which unidirectionally transmits the received neuronal inputs to the corresponding neuron body. In step with the transmission of neuronal inputs with large/small pulse width and pulse amplitude, the synapses in learning process will be activated/suppressed by recording a high/low-state synaptic weight in itself, where the p-MTJs are used as nonvolatile memory devices. This weight can be convolved to neuronal inputs again for recognition processes utilizing the p-MTJs as programmable resistors. Thus, the pattern of neuronal inputs can be learned as the pattern of weights stored in synapses, where the activated/suppressed synapses will pass-through/filter-out the neuronal inputs. The neuron body, finally, accumulates the signals from all synapses and gives a neuronal output responding to the patterns similar to the learned one. The developed neuron circuit successfully accomplishes high-speed color pattern learning and recognition within 0.15μs and 0.6μs, respectively. Because core functions of synapses are simply contributed by the p-MTJs, the circuit architecture becomes very compact, which requires only a few transistors for the attached circuitry. Moreover, the standby power dissipation is eliminated because the learning results can be stored in the nonvolatile memory devices (p-MTJs) without any electrical power. Furthermore, the operation power consumption during recognition processes is also minuscule because the synapse is designed to be driven by the neuronal input itself (a pulse voltage signal) without any other static power supply.

Based on the developed neuron circuit, building a large-scale and low-power neuromorphic processor becomes possible. Recently, we are attempting to apply this neuron circuit in specialized neural networks for achieving motion detection and object recognition applications. This study was conducted as the first effort to build a practical platform of non-volatile neuromorphic processor that can realize the general brain-inspired visual processing.

Reference:

Yitao Ma and Tetsuo Endoh, "A Novel Neuron Circuit with Nonvolatile Synapses Based on Magnetic-Tunnel-Junction for High-Speed Pattern Learning and Recognition", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2015), 4B-1, pp. 273-278, Jeju KAL Hotel, Jeju Island, Korea, June 29-July 1, 2015.